Differential signalling is a known method of transmitting information electrically by means of two complementary signals that are transmitted over two separate paths, for example over two separate electrical paths or wires. Differential signalling provides various advantages over single-ended signalling techniques, such as its tolerance to ground offsets, suitability for use with low-voltage devices due to increased noise immunity, and resistance to electromagnetic interference through the use of balanced lines. A well known use of differential signalling is in transmission of high data rate signals, between integrated circuit devices (such as external System-on-Chip (SoC) Double Data Rate (DDR) signals).
FIG. 1 illustrates a typical example of a typical differential signalling 100. A first integrated circuit device 110 comprises a differential signal driver 120. The differential signal driver 120 is arranged to convert an input signal 105, which for the illustrated example comprises a digital input signal, into a differential signal comprising two complementary voltage signals 130, 135. The differential signal driver 120 translates the complementary voltage signals into a pair of dynamic current signals, which it transmits over a signal path comprising a pair of balanced signal lines 140, 145.
The balanced signal lines 140, 145 provide a signal path from the differential signal driver 120 of the first integrated circuit device 110 to a second integrated circuit device 150, where the balanced signal lines 140, 145 are terminated by termination elements 160, 165. The termination elements 160, 165 receive the dynamic current signals and convert the dynamic current signals into complementary voltage signals 170, 175, and provide the complementary voltage signals 170, 175 to receiver 180. The receiver 180 converts the differential signal comprising the received complementary voltage signals 170, 175 into a single ended output signal 185, which for the illustrated example comprises a digital output signal.
A problem with using differential signalling in this manner is the increased current consumption due to, for example, a DC (Direct Current) component of each of the two termination elements 160, 165, and the double swing of differential dynamic currents within the current signals 130, 135 for every signal path. Another problem with the use of differential signalling is the need for two input/output (IO) pads (not illustrated) for each signal path, which due to the high functionality of modern SoCs are limited in number and require very tight integration with numerous interfaces.
FIG. 2 illustrates a proposed solution for reducing the effect of the aforementioned problems in the form of a half-differential signalling arrangement 200. A first integrated circuit device 210 comprises a driver 220 arranged to convert an input signal 205 into a single dynamic voltage signal 230. The driver 220 also translates the dynamic voltage signal 230 into a dynamic current signal, and transmits it over a signal path comprising a single signal line 240. The single signal line 240 provides a signal path from the driver 220 of the first integrated circuit device 210 to a second integrated circuit device 250, where the single signal line 240 is terminated by termination element 260. The termination element 260 receives the dynamic current signal and converts it into complementary voltage signals 270, 275, and provides the complementary voltage signals 270, 275 to receiver 280. The receiver 280 then converts the complementary voltage signals 270, 275 into a single ended output signal 285.
In particular, the driver 220 is arranged to generate the single dynamic voltage signal 230 such that it comprises a voltage swing about a common reference voltage 235 (for example approximately half the supply voltage), which is provided over a reference voltage line 245. The reference voltage 235 is also received by termination element 260, which is able to use the common reference voltage 235 to calibrate the complementary voltage signals 270, 275. In this manner, a single common reference voltage line 245 may be used for multiple signal lines.
The half-differential approach illustrated in FIG. 2 is able to provide the benefits provided by full differential signalling, such as tolerance to ground offsets and immunity to increased noise due to the use of the common reference voltage, as well as a resistance to electromagnetic interference through the use of balanced reference voltage and signal lines. Advantageously, whilst 2*n lines (and therefore 2*n pads per integrated circuit device) are required to provide n signals using full differential signalling, the half-differential approach illustrated in FIG. 2 only requires n+1 lines (and n+1 pads per integrated circuit device). Thus, fewer signal lines and input/output (I/O) pads are required to provide the signalling between the two integrated circuit devices. Furthermore, for the full differential approach of FIG. 1, two dynamic currents are required to be consumed by termination elements 160, 165 per signal, whilst only a single current is required to be consumed by termination element 260 per signal, thereby resulting in a reduction in power consumption.
A problem with the half-differential approach illustrated in FIG. 2 is that it is difficult to generate a reliable reference voltage. Accordingly, such a solution requires a high-quality amplifier, illustrated generally at 290, for generating the reference voltage. In particular, the amplifier 290 is required to comprise a very high capability of both load and sink currents for the reference voltage generation.
One proposed solution to overcome the difficulty in generating a reliable reference voltage is to provide the reference voltage generation circuitry in a first device, for example the first integrated circuit device 210, and to provide compensation circuitry within a second integrated circuit device receiving the reference voltage, for example the second integrated circuit device 250. In this manner, the compensation circuitry is able to provide feedback to the reference voltage generation circuitry to allow for supply voltage changes and the like to be compensated for. Whilst such a solution enables a lower quality amplifier to be used to generate the reference voltage, it still requires amplifier circuitry to generate the reference voltage, in addition to the additional compensation circuitry.